От: fpga journal update [news@fpgajournal.com]
Отправлено: 8 июня 2005 г. 2:16
Кому: Michael Dolinsky
Тема: FPGA Journal Update Vol VII No 10


a techfocus media publication :: June 7, 2005 :: volume VII, no. 10


FROM THE EDITOR

This week we take a look at Altium Designer, a new EDA tool suite that tackles the emerging trend toward FPGA-centric system design. If Altium's bet pays off, fully integrated tool suites like Altium Designer may soon replace the point-tool-based design environments prevalent today.

Our second article, from Pico Computing and Impulse Accelerated Technologies, describes the acceleration of C software algorithms using an FPGA-based card and high-level compilation technology. The reconfigurable computer that fits in your pocket may be a viable acceleration alternative for many performance-hungry applications.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal


LATEST NEWS

June 7, 2005

FS2 Introduces SB NAVIGATOR™ Trace Tools for Sonics SiliconBackplane SMART Interconnect

QuickLogic Ships Industry's Lowest Power Mil-Temp FPGAs; Eclipse II Ultra Low-Power Programmable Logic Devices Combine Performance, Density and Embedded SRAM for High Reliability Applications

Synopsys' DFM Environment Selected by Texas Instruments for Design and Process Development for the 65-Nanometer Node and Beyond

Altera Announces DSP Development Kit With Industry's Highest-Density FPGA

June 6, 2005

True Circuits Attends Design Automation Conference, Features Complete Line of PLL and DLL Intellectual Property for ASIC, FPGA and SoC Designs

Monolithic Power's Compact, 13.5V / 1.5A Buck Regulator with 90% Efficiency

At DAC: EVE Demonstrates Hardware-Assisted Verification Platform; ZeBu Exploits Breakthrough Hardware/Software Architecture

Industry Leaders Gather to Showcase DSP Ecosystem at Altera's Code:DSP Seminar

Xilinx Announces Customer Shipments Of Virtex-4 FX60 FPGAs With Industry's First 622Mbps - 10.3125Gbps Serial Transceivers

Xilinx Announces Immediate Availability of Industry's First 4 Gbps Programmable Fibre Channel Solution

Xilinx, CorEdge and Yamaichi Demonstrate Flexible 10gbps Packet Processing on Industry Standard ATCA/AMC Platform

Napatech Announces Fully Programmable Network Adapter

STMicroelectronics Adds DSP to Reconfigurable-Processor SoC for Wireless Infrastructure Applications

Corrent Chooses Faraday's NC-1 for Network Security Processor Chip

June 3, 2005

Poseidon Design Systems Joins Altera Access Program

Xilinx Widens Process Technology Leadership - Ships More Than 3.5 Million 90nm FPGAs

Xilinx Virtex-II Pro World's Most Popular 130nm FPGA

June 2, 2005

Averant Announces AMBA 3 AXI Protocol Checker

FishTail To Showcase Rapid Timing Exception Generation, Gate-Level and RTL Exception Verification at DAC -- booth #2152

Calypto and Mentor Graphics Integrate Tools for Verifiable, Automated Path from System to RTL; Calypto Joins Mentor OpenDoor Program

Siemens Chooses Mentor Graphics as Global EDA Partner in Multi-Tool Deal

June 1, 2005

Lattice Launches Leader Design Services Program; Partnerships with Leading Design Services Companies will Expand Access to Lattice Products, Shorten Customers' Time to Market

Altera's Stratix FPGAs Boost Performance and Drastically Reduce Cost for Cape Range Wireless

Actel Broadens Popular PCI Product Family With CorePCIF

Xilinx Demonstrates High-Performance Virtex-4 FPGAs at SUPERCOMM 2005

CURRENT FEATURE ARTICLES

Shrink-wrapping EDA
Altium Designer Changes the Rules
Accelerating C Software Applications
by Greg Edvenson, Pico Computing and
David Pellerin, Impulse Accelerated Technologies

Core Sample
IP for Increased Productivity
Redefining Structured ASIC

eASIC's Better Idea
Pedal to the Metals
A Crash Course in High-Speed Design
Selecting the FPGA that Meets Your Signal Integrity Requirements
by Lalitha Oruganti, Sr. Product Marketing Engineer, FPGA Products, Altera Corporation
World's Best FPGA Article
Up to 53% More Interesting


Shrink-wrapping EDA
Altium Designer Changes the Rules

When I bought my first 10MB hard-disk drive, the salesman came to visit and even took me out to lunch. I was a freshman in engineering school and I was buying the $10,000 unit for my employer, a hotel chain, to use for storing reservation data. At the time, a purchase of that amount of mass storage was a major transaction, both for our little company and for our supplier. The disk drive, about the size of a modern desktop computer, was delivered and installed by a trained technician who spent an hour with us going over the operating procedures for the unit.

History sometimes repeats itself a generation later. Last week, my teenage daughter bought approximately twelve times that amount of mass storage from a Target store using her leftover babysitting money. Once inside her car, she opened the shrink-wrapped plastic bubble pack, removed the tiny SD card, and dropped it into her change purse for easy access. When she needs to install it, she’ll pop open the door of her point-and-shoot digital camera, pull out the old card, and drop the new one in.

When I got my first engineering job after college, I worked for an EDA company that sold place-and-route software to semiconductor companies. Our system cost about $250,000 and our customers did lengthy and elaborate evaluations to be sure it could handle that phase of their electronic designs. We sent trained technicians to install and monitor the operation of our software, a million or so lines of FORTRAN that sometimes buckled under the weight of 10K gate ASIC designs.

History sometimes repeats itself a generation later. Last week, Altium Ltd. announced the availability of Altium Designer, a shrink-wrapped, complete EDA tool suite that can take complex, multi-million gate system designs all the way from concept through FPGA design and board layout. Altium Designer combines the capabilities of the company’s DXP, Protel, Nexar, Circuit Studio, and CAMtastic product lines into one low-cost, integrated environment for the electronic designer’s desktop. Protel and Nexar were each already highly integrated suites of tools, so the overall level of integration seems unprecedented in EDA. [more]

Accelerating C Software Applications
by Greg Edvenson, Pico Computing and
David Pellerin, Impulse Accelerated Technologies

As the cost per gate of FPGAs continues to plummet, developers of embedded software applications are being presented with increased opportunities to create high performance, hardware-accelerated systems. These systems—which represent applications in domains ranging from image processing and DSP to larger-scale applications for scientific computing—benefit from the massive levels of parallelism that are available when FPGAs are used as alternatives to traditional processor architectures.

This article describes how the convergence of easier-to-use, more powerful FPGA-based computing platforms and software-to-hardware design tools can make the design of accelerated FPGA-based algorithms easier and more practical for software application developers. The article also presents actual performance numbers for a benchmark algorithm, helping to illustrate the speedups that are possible when FPGAs are included in an overall embedded computing strategy. These results are easily achievable for other computationally-intensive algorithms using current-generation FPGA platforms and available tools.

Overview
It is widely understood that FPGAs have the potential to radically change the way that high-performance embedded applications are created. These devices can accelerate many applications by multiple orders of magnitude, by virtue of their massively parallel structures. But to achieve this level of acceleration it has, until recently, been necessary to apply low-level, FPGA-specific hardware design skills and tools. This fact has greatly limited the penetration of FPGAs as mainstream computing platforms. [more]

ANNOUNCEMENTS

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