|
Shrink-wrapping EDA
When I bought my first 10MB hard-disk drive, the salesman came to visit and even took me out to lunch. I was a freshman in engineering school and I was buying the $10,000 unit for my employer, a hotel chain, to use for storing reservation data. At the time, a purchase of that amount of mass storage was a major transaction, both for our little company and for our supplier. The disk drive, about the size of a modern desktop computer, was delivered and installed by a trained technician who spent an hour with us going over the operating procedures for the unit. History sometimes repeats itself a generation later. Last week, my teenage daughter bought approximately twelve times that amount of mass storage from a Target store using her leftover babysitting money. Once inside her car, she opened the shrink-wrapped plastic bubble pack, removed the tiny SD card, and dropped it into her change purse for easy access. When she needs to install it, she’ll pop open the door of her point-and-shoot digital camera, pull out the old card, and drop the new one in. When I got my first engineering job after college, I worked for an EDA company that sold place-and-route software to semiconductor companies. Our system cost about $250,000 and our customers did lengthy and elaborate evaluations to be sure it could handle that phase of their electronic designs. We sent trained technicians to install and monitor the operation of our software, a million or so lines of FORTRAN that sometimes buckled under the weight of 10K gate ASIC designs. History sometimes repeats itself a generation later. Last week, Altium Ltd. announced the availability of Altium Designer, a shrink-wrapped, complete EDA tool suite that can take complex, multi-million gate system designs all the way from concept through FPGA design and board layout. Altium Designer combines the capabilities of the company’s DXP, Protel, Nexar, Circuit Studio, and CAMtastic product lines into one low-cost, integrated environment for the electronic designer’s desktop. Protel and Nexar were each already highly integrated suites of tools, so the overall level of integration seems unprecedented in EDA. [more] Accelerating C Software
Applications As the cost per gate of FPGAs continues to plummet, developers of embedded software applications are being presented with increased opportunities to create high performance, hardware-accelerated systems. These systems—which represent applications in domains ranging from image processing and DSP to larger-scale applications for scientific computing—benefit from the massive levels of parallelism that are available when FPGAs are used as alternatives to traditional processor architectures. This article describes how the convergence of easier-to-use, more powerful FPGA-based computing platforms and software-to-hardware design tools can make the design of accelerated FPGA-based algorithms easier and more practical for software application developers. The article also presents actual performance numbers for a benchmark algorithm, helping to illustrate the speedups that are possible when FPGAs are included in an overall embedded computing strategy. These results are easily achievable for other computationally-intensive algorithms using current-generation FPGA platforms and available tools. Overview
|
All material
copyright © 2003-2005 techfocus media, inc. All rights reserved. |